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Possilble Deadlock situation!

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    Hello !

    This problem/issue is known - in situation like this, both edges - FINAL16,FINAL15 are bufferes so the SPLIT component can keep sending data to one or other and merge can
    keep reading from both.

    BUT ! the size of the buffer (which is internal) is limited and once filled, it causes the deadlock.

    The solution:
    a) increase the buffer size, so it can accomodate more records

    b) put splitter and merger to two different phases - this ensures full buffering (on disk) so
    you can first process all data in splitter and then merge them

    c) don't create transformation class/node with
    two ports connected but the intention to send data only through one of them. If you want to crash the engine, you will definitely succeed :-)

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